TTP229-LSF
TM
TonTouch
16 KEYS OR 8 KEYS TOUCH PAD DETECTOR IC
GENERAL DESCRIPTION
The TTP229-LSF TonTouchTM IC is capacitive sensing design specifically for touch pad controls. The device built in regulator for touch sensor. Stable sensing method can cover diversity conditions. Human interfaces control panel links through non-conductive dielectric material. The main application is focused at replacing of the mechanical switch or button. The ASSP can independently handle the 8 touch pads or up to 16 touch pads.
FEATURES
Operating voltage:2.4V~5.5V Built-in regulator Stand-by current
At 3V, and sleep mode slow sampling rate 8Hz: => Typical 2.5uA for 16 input keys => Typical 2.0uA for 8 input keys
Provides to set 8 direct keys or 16 direct keys by option
Provides to set 8 separate outputs only for 8 direct input keys mode
Has I2C-bus slave interface, both can use for 8 and 16 direct input keys mode TTP229-LSF Slave Device Identifier and Address => [1010 111R] 8 separate outputs can select output driving types by option (CMOS/OD/OC with active high/low)
Offer multi-key or single-key feature by option
Provides two kinds of sampling rate that slow sampling rate 8Hz and fast sampling rate Hz at sleep mode
Have the maximum key-on time about 80sec by pin option Sensitivity can adjust by the capacitance(1~50pF) outside After power-on have about 0.5sec stable-time,
During the time do not touch the key pad, and all functions are disabled Auto calibration for environment changing
And the re-calibration period is about 4.0sec, when all keys are not activated for fixed time
APPLICATION
Wide consumer products Button key replacement
10’/02/25 Page 1 of 18 Ver : 1.0
Preliminary TTP229-LSF TMTonTouch SENADJ2TP8TP9TP10TP11TP12TP13TP14TP15SENADJ3SDOBLOCK DIAGRAM SENADJ0TP0TP1TP2TP3SENADJ1TP4TP5TP6TP7Timing CounterandKey ScanningandFunction ControlCircuitSense PortandDetecting CircuitOutput Buffer&Sense InputCircuitSLPSENASLPSENBWake-upDetecingControl CircuitSystemOscillator CircuitFunction OptionControl CircuitTESTI2C-bus interfaceControl CircuitSCLSDARegulatorCircuitSystemPower On Circuit PACKAGE CONFIGURATION SLPSENATP3TP2SENADJ0TP1TP0TP15TP14SENADJ3TP13TP12SDASDOSCL123456710111213142827262524232221201918171615VSSVDDTP4TP5SENADJ1TP6TP7TESTTP8TP9SENADJ2TP10TP11SLPSENB TTP229-L(SSOP-28)10’/02/25 Page 2 of 18 Ver : 1.0 Preliminary
TTP229-LSF
TM
TonTouch
PIN DESCRIPTION
Pin No. Pin Name Share Pin I/O Type1 SLPSENA 2 TP3 SKMS1 3 4 5 6 7 8 9 10 11 12
TP2 SENADJ0 TP1 TP0 TP15 TP14 SENADJ3 TP13 TP12 SDA
KYSEL SAHL OPDEN TPQ7 TPQ6 TPQ5 TPQ4
Pin Description
I/O Sleep mode sensitivity adjustment pin for group-A(TP0~7)I/O Touch pad input pin(KEY-3)
Key action function option-1(Single-key/Multi-key) Default is all single-key I/O Touch pad input pin(KEY-2)
Key number function option(8-keys/16-keys) Default is 8-keys
I/O Touch pad TP0~3 sensitivity adjust common pin I/O Touch pad input pin(KEY-1)
Output type function option(Active High/Low) Default is active-high for TPQ0~7 I/O Touch pad input pin(KEY-0)
Output type function option(CMOS/OD/OC for 8-keys) Default is CMOS
I/O/ODTouch pad input pin(KEY-15)
8-keys direct output pin(TPQ7)
I/O/ODTouch pad input pin(KEY-14)
8-keys direct output pin(TPQ6)
I/O Touch pad TP12~15 sensitivity adjust common pin I/O/ODTouch pad input pin(KEY-13)
8-keys direct output pin(TPQ5)
I/O/ODTouch pad input pin(KEY-12)
8-keys direct output pin(TPQ4)
I/OD Data pin for the I2C-bus serial data interface
O Data valid signal output, option active Low/High by TP1 I Serial clock input pin for the I2C-bus serial interface I/O
13 SDO
14 SCL 15 16 17 18 19 20
SLPSENB TP11 TP10 SENADJ2 TP9 TP8
TPQ3 TPQ2 TPQ1 TPQ0
Sleep mode sensitivity adjustment pin for group-B(TP8~15)
I/O/ODTouch pad input pin(KEY-11)
8-keys direct output pin(TPQ3)
I/O/ODTouch pad input pin(KEY-10)
8-keys direct output pin(TPQ2)
I/O Touch pad TP8~11 sensitivity adjust common pin I/O/ODTouch pad input pin(KEY-9)
8-keys direct output pin(TPQ1)
I/O/ODTouch pad input pin(KEY-8)
8-keys direct output pin(TPQ0)
10’/02/25 Page 3 of 18 Ver : 1.0
Preliminary
TTP229-LSF
TM
TonTouch
Pin No. Pin Name Share Pin I/O Type21 22 23 24 25 26 27 28
Note:Pin Type
Pin Description
Only for test
Touch pad input pin(KEY-7)
Maximum key-on time function option(Infinite/80sec) Default is infinite
Touch pad input pin(KEY-6)
Sleep mode sampling length function option(4.0/2.0mS) Default is 4.0ms
Touch pad TP4~7 sensitivity adjust common pin Touch pad input pin(KEY-5)
Sampling rate at sleep mode function option(8Hz/Hz) Default is 8Hz
Touch pad input pin(KEY-4)
Key action function option-0(Single-key/Multi-key) Default is all single-key Positive power supply Negative power supply, ground
TEST TP7 TP6 SENADJ1 TP5 TP4 VDD VSS
SKSRT SLWPTM
WPSCT SKMS0
I-PL I/O I/O I/O I/O I/O P P
I =>CMOS input only
I-PH =>CMOS input and pull-high resister I-PL =>CMOS input and pull-low resister O =>CMOS push-pull output I/O =>CMOS I/O
P =>Power / Ground
OD =>CMOS open drain output
(For OD TPQ0~TPQ7 pins have Diode protective circuit, SDA pin has no Diode protective circuit)
10’/02/25 Page 4 of 18 Ver : 1.0
Preliminary
ELECTRICAL CHARACTERISTICS
TTP229-LSF
TM
TonTouch
‧Absolute Maximum Ratings
=
Parameter SymbolConditions Value Unit Operating Temperature TOP ─ -40 ~ +85 ℃ Storage Temperature TSTG =─ -50 ~ +125 ℃ =Power Supply Voltage VDD =VSS-0.3 ~ VSS+6.0 V Ta=25°C =Input Voltage VIN VSS-0.3 to VDD+0.3 V Ta=25°C Human Body Mode ESD ─ 6 KV Note:VSS symbolizes for system ground
‧DC/AC Characteristics:(Test condition at room temperature=25℃)
Parameter
Operating Voltage Internal Regulator Output Operating Current (no load)
Stand-by Current (VDD=3.0V)
(Sampling length 4.0mS)
=
Symbol
VDD VREG Test Condition
Min. Typ. Max.Unit
2.4 - 5.5 V 2.2 2.3 2.4 V 20 uA
VDD3.0V IOP
ISD
Sampling rate Set 8-Keys 2.0 8Hz Set 16-Keys 2.5
uA
Sampling rate Set 8-Keys 5.5 Hz Set 16-Keys 9.0 0 - 0.2 VDD0.8 - 1.0 VDD- -4 - mA 125
15.6 32 16 50 80 110
mSmSmSmSSec
Input Ports Input Ports
Output Port Sink Current Output Port Source Current Wake-up Response Time (at sleep mode)
Output Response Time (at operation)
Maximum Key-on Time Input Pin Pull-low Resistor (TEST)
VIL Input Low Voltage VIH Input High Voltage VOH2.4V IOH VDD3V, VDD=3V, Sampling rate 8Hz
VDD=3V, Sampling rate HzTR VDD=3V, set 16-keys
VDD=3V, set 8-keys TMOT RPL VDD3V, TWU
VOL0.6V - 8 - mAIOL VDD3V, 30K ohm
10’/02/25 Page 5 of 18 Ver : 1.0
Preliminary
TTP229-LSF
TM
TonTouch
FUNCTION DESCRIPTION
1. Sensitivity adjustment
The total loading of electrode size and capacitance of connecting line on PCB can affect the
sensitivity. So the sensitivity adjustment must according to the practical application on PCB. The TTP229-LSF offers some methods for adjusting the sensitivity outside. 1-1 by the electrode size Under other conditions are fixed. Using a larger electrode size can increase sensitivity. Otherwise it can decrease sensitivity. But the electrode size must use in the effective scope. 1-2 by the panel thickness Under other conditions are fixed. Using a thinner panel can increase sensitivity. Otherwise it can decrease sensitivity. But the panel thickness must be below the maximum value. 1-3 by the value of external capacitor (please see the down Figure 1-3-1) Under other conditions are fixed. When adding the values of CJ0~CJ3 and CJWA and CJWB will reduce sensitivity in the useful range (1pF≦CJ0~CJ3≦50pF, 1pF≦CJWA~CJWB≦50pF). When do not use any capacitor that means open on the position of capacitor, the sensitivity is most sensitive. The capacitors CJ0~CJ3 are used to adjust the sensitivity of keys at operation mode. The capacitors CJWA and CJWB are used to adjust the Wake-up sensitivity at sleep mode. About the relation of capacitor and controlled keys please to see below table. The capacitor The keys-group controlled and adjusted CJ0 K0~K3 group CJ1 K4~K7 group CJ2 K8~K11 group CJ3 K12~K15 group CJWA K0~K7 group CJWB K8~K15 group Note:When using the value of capacitor to adjust the sensitivity, recommending to adjust the CJ0~CJ3 capacitor for K0~K15 first, then adjusting the CJWA and CJWB capacitor for Wake-up sensitivity. K0ELECTRODEK1K2K3CJ1CJ0CJ2K8K9K10K11CJ3K4K5K6K7CJWAVDDSENADJ2SENADJ0TP0TP8TP1TP9TP10TP2TP11TP3SENADJ3SENADJ1TP12TP4TP13TP5TP14TP6TP15TP7SLPSENASLPSENBTESTSDASCLSDOK12K13K14K15VSSCJWB Figure 1-3-1 10’/02/25 Page 6 of 18 Ver : 1.0 Preliminary TTP229-LSF TMTonTouch 2. Input keys number select The TTP229-LSF has 8 keys input mode and 16 keys input mode. These modes are selected via high-value resistor connected to the TP2(KYSEL) pin to VSS, or not. The default that TP2(KYSEL) pin is not used resistor connected to VSS is selected 8 keys input mode. Another is selected 16 keys input mode that has used a high-value resistor connected to VSS. 3. Output mode The TTP229-LSF has 8 pins direct output mode and I2C-bus slave interface mode. The output of 16 keys input mode only offer I2C-bus slave interface. The 8 keys input mode has two kinds of output that 8 pins direct output and I2C-bus slave interface. The 8 pins direct output only use at 8 keys input mode. 3-1 At the 8 pins direct output mode, the TTP229-LSF has two kinds of output type that they are CMOS type output and OD (Open Drain) type output. These are selected by the TP0(OPDEN) pin. The CMOS type output is default that the TP0(OPDEN) pin is not used any component to VSS. When the TP0(OPDEN) pin is used a high-value resistor connected to VSS, it is selected OD type output. 3-2 When selecting 8 pins direct CMOS output mode, the output channels can be set active-high or active-low by TP1(SAHL) pin. The default that the TP1(SAHL) pin is not used a high-value resistor, it is set active-high. When the TP1(SAHL) pin has a high-value resistor connected to VSS, it is set active-low. 3-3 At 8 pins direct OD output mode, it has OD (Open Drain) or OC (Open collector) output mode to be selected by the TP1(SAHL) pin. The TP1(SAHL) pin has a high-value resistor connected to VSS, it is selected OC mode. Another it is selected OD mode that does not has a resistor. The default is OD mode. The states of OD mode are floating and active-low. And the states of OC mode are floating and active-high. The structure of OD and OC output mode please to see the below figure. ControlTPQ0~7ControlNOD ModeOC ModePTPQ0~7 Note:the output pins have Diode protective circuit in the chip. So when it selected OD or OC mode. Do not propose to connect other device that uses the different voltage. That avoids to occurring the leakage current in the system. 10’/02/25 Page 7 of 18 Ver : 1.0
Preliminary
2
TTP229-LSF
TM
TonTouch
3-4 At IC-bus slave interface mode the SDA pin is a serial data pin, the SCL is a serial clock input pin. The SDA and SCL pins must be pulled-high with an external resistor.
And the 4-bits identify code for the TTP229-LSF is〝 (1010) 〞. The device address for TTP229-LSF B3~B1 bits are fixed 〝 111 〞. The TTP229-LSF 8-bits slave device address includes 4-bits identifier, 3-bits address and R/W bit (see the Table 3-4-1).
The TTP229-LSF IC uses the I2C-bus slave interface data transmission protocol to output the data of the touch pads (TP0~TP15 pins), so the TTP229-LSF only accepts the read operation that R/W bit is〝 1 〞. If it is〝 0 〞, the TTP229-LSF will not respond the write operation. Otherwise, the I2C-bus slave interface of TTP229-LSF conforms to the communication protocols. It supports the fast mode that the maximum SCL clock frequency is 400KHz.
The I2C-bus slave interface supports the following communication protocols:
Bus not busy : The SDA and the SCL lines remain High level when the bus is not active. Start condition : Start condition is SDA 1 to 0 transition when SCL=1.(see figure 3-4-2) Stop condition : Stop condition is SDA 0 to 1 transition when SCL=1.(see figure 3-4-2) Data valid : Following a start condition, the data on the SDA line must be stable during the High period of SCL. The High or Low state of the data line can only change when the clock signal on the SCL line is Low.(see figure 3-4-2)
ACK (Acknowledge) : An ACK signal indicates that a data transfer is completed successfully. The transmitter (the master or the slave) releases the bus after transmitting eight bits. During the ninth clock, which the master generates, the receiver pulls the SDA line low to acknowledge that it successfully received the eight bits of data. But the slave does not send an ACK if it does not successfully received the eight bits of data.
In data read operations, the slave releases the SDA line after transmitting 8 bits of data and then monitors the line for an ACK signal during the ninth clock period. If an ACK is detected, the slave will continue to transmit next data. If an ACK is not detected, the slave terminates data transmission and waits for a stop condition to be issued by the master before returning to its stand-by mode. Slave Address : The identify code for the TTP229-LSF is〝 (1010) 〞. The device address B3 , B2 and B1 are fixed〝 111 〞.
Read/Write : The final (eighth) bit of the slave address defines the type of operation to be performed. If the R/W bit is〝 1 〞, a read operation is executed. If it is〝 0 〞, a write operation is executed. But the TTP229-LSF only accepts read operation.
The sequence of read data operation please see figure 3-4-1.
Table 3-4-1. Slave Device Addressing Device Identifier Device Address R/W Bit Device
B7 B6 B5 B4 B3 B2 B1 B0 TTP229-LSF 1 0 1 0 1 1 1 R
10’/02/25 Page 8 of 18 Ver : 1.0
Preliminary Start Slave AddressData_0TTP229-LSF TMTonTouch Data_1StopB7B6B5B4B3B2B1B0NOT ACKfrom masterA2A1A0RB7B6B5B4B3B2B1B0ACKfrom slaveACKfrom masterFor 16 input keys modeStartSlave AddressData_0StopA2A1A0RB7B6B5B4B3B2B1B0NOT ACKfrom masterACKfrom slaveFor 8 input keys mode Note : Data_0 : B7~B0 is TP0~TP7 on/off status. 0 is key off, 1 is key on. Data_1 : B7~B0 is TP8~TP15 on/off status. 0 is key off, 1 is key on. Figure 3-4-1. Read Operation Sequence SDASCLSSTARTConditionPSTOP condition Data or DataACK ValidChange Figure 3-4-2. Data Transmission Sequence SDASCLSSTARTADDRESSConditionR/WACKDATAACKDATAACK1 - 71 - 71 - 7 PSTOPCondition Figure 3-4-3. A complete data transfer SDAtfSCLStHD;STAtHD;DATtHIGHtSU;STASrtSU;STO2 tLOWtrtSU;DATtftHD;STAtrtBUFPS Figure 3-4-4. Definition of timing for F/S-mode devices on the IC-bus 10’/02/25 Page 9 of 18 Ver : 1.0 Preliminary
TTP229-LSF
TM
TonTouch
2
Table 3-4-2. Characteristics of the SDA and SCL bus lines for F/S-mode IC-bus devices
Parameter SymbolStandard-Mode Fast-Mode UnitMin. Max. Min. Max. SCL clock frequency fSCL 100 400 KHz LOW period of the SCL clock tLOW 4.7 1.3 us HIGH period of the SCL clock tHIGH 4.0 0.6 us Hold time (repeated) START tHD;STA 4.0 0.6 us condition
Set-up time for a repeated START tSU;STA 4.7 0.6 us condition
Data hold time tHD;DAT 0 0 us Data set-up time tSU;DAT 250 100 ns Rise time of both SDA and SCL tr 1000 300 ns signals
Fall time of both SDA and SCL tf 300 300 ns signals
Set-up time for STOP condition tSU;STO 4.0 0.6 us Bus free time between a STOP and tBUF 4.7 1.3 us START condition
Capacitive load for each bus line Cb 400 400 pF
3-5. Data valid (DV) signal output
The TTP229-LSF can output the Data Valid signal (DV pulse) by SDO pin, when the state of any key (TP0~TP15) has be detected change at the normal operation mode. It can use to trigger other device. And it can be set active high or low by TP1(SAHL) pin. The default is active-low that TP1(SAHL) pin is not used resistor connected to VSS. Another it is active-high. The typical value of DV pulse width is 93us. About the DV pulse please see the below figure.
When the system for TTP229-LSF is set to use the maximum key-on time enable function, and key detected touch and kept over the timer (about 80sec), the TTP229-LSF will return to the power-on initial state, and the key state becomes inactive until the next detection. At the time key state has change, but the SDO pin does not output the DV pulse. The point needs to attend.
DV
(Active-High)
DV
(Active-Low)
Detecting Key-touch or releaseDetecting Key-touch or releaseDVDV
SDO
SDO
DV pulse width Typ. = 93us.
10’/02/25 Page 10 of 18 Ver : 1.0
Preliminary
TTP229-LSF
TM
TonTouch
4. Key operating mode The TTP229-LSF has the Single-key and Multi-key functions. These functions are set by TP3(SKMS1)
and TP4(SKMS0) pins. The all 16 keys can use one group, or the 16 keys can distributed into two
groups. The group-1 includes TP0, TP1, TP2, TP3, TP8, TP9, TP10, TP11 keys. The group-2 includes TP4, TP5, TP6, TP7, TP12, TP13, TP14, TP15 keys. How to set the function? Please see below table 4-1: Table 4-1. The functions of TP3(SKMS1) and TP4(SKMS0) option
TP3 TP4 Operating function
(SKMS1)
(SKMS0)
1 1 All Single-keys:one group(16keys) 1 0 Two groups operate:group-1=>Single key;group-2=>Single key 0 1 Two groups operate:group-1=>Single key;group-2=>Multi key 0 0 All Multi-keys:one group(16 keys)
Note:1. One group:TP0~TP15. Two groups:Group-1=>TP0,TP1,TP2,TP3,TP8,TP9,TP10,TP11. Group-2=>TP4,TP5,TP6,TP7,TP12,TP13,TP14,TP15. 2. When uses 8 input keys mode. The using keys are TP0~TP7. 3. The option states of TP3 and TP4, the〝0〞state is used a high-value resistor connected to
VSS, the〝1〞state is not used resistor connected to VSS.
4. The key detection acknowledges in Single-key function, the priority is by the key scanning
order (from TP0 to TP15) when many keys are touched effectively. It is not by the key touching strength.
5. Wake-up sampling rate and sampling length at sleep mode
The TTP229-LSF has two kinds of sampling rate at sleep mode. These are 8Hz and Hz. The two functions are selected by TP5(SLWPTM) pin. The TP5(SLWPTM) pin has used a high-value resistor connected to VSS, it selected the Hz sampling rate. Another it is 8Hz that is not used resistor connected to VSS. The 8Hz sampling is the default. And TTP229-LSF has two kinds of sampling length at sleep mode. They are 4ms and 2ms that are
selected by TP6(WPSCT) pin. The default is 4ms that TP6(WPSCT) pin is not used resistor connected to VSS. Another it is 2ms that TP6 pin has used a high-value resistor connected to VSS.
Wake-up sampling timing and length in the sleep mode:
8Hz=>125msor
Hz=>15.6ms4.0ms or 2.0ms
Wake-upDetectclock
10’/02/25 Page 11 of 18 Ver : 1.0
Preliminary
TTP229-LSF
TM
TonTouch
6. Maximum key-on time
If some objects cover in the sense pad, and causing the change quantity enough to be detected. To prevent this, the TTP229-LSF sets a timer to monitor the detection. The timer is the maximum key-on time. It is set about 80sec at 3V. When the detection is over the timer, the system will return to the power-on initial state, and the output becomes inactive until the next detection. The function is set via a high-value resistor connected to the TP7(SKSRT) pin to VSS. The TP7(SKSRT) pin does not has the resistor, it is set disable the maximum key-on time, then the key acts infinitely, this is the default. Another it is set enable the maximum key-on time that has a resistor.
7. Built-in regulator
The capacitive sensing touch pad IC needs stable power. So the TTP229-LSF built in regulator in the chip. It can make the internal power to keep up steady. And the sensitivity detection is normal for chip. And the stable power can avoid sensitivity anomalies and false detections.
8. Auto calibration function
The TTP229-LSF includes a full auto-calibration function. After the device is powered-on, it will calibrate the initial condition of environment first. On the duration time all the functions are disabled, so do not operate. Then the system is into stand-by mode. And all keys are not detected touch more than about 4 seconds, then the system do re-calibration automatically. The procedure is fixed and repeated. By implementing this feature the system can catch the conditions of environment changing. And let operation of the system is normal.
10’/02/25 Page 12 of 18 Ver : 1.0
Preliminary TTP229-LSF TMTonTouch 9. The timing from sleep mode to operation mode False TriggerFingerTriggerSleep modeWake-upDetectPeriodKeyScanningPeriodDetectedKey-outTime is about 4secKey scanningSleep modeRe-calibrationRe-calibrationTime is about 4sec Figure 9-1. The timing for false trigger FingerTriggerSleep modeWake-upDetectPeriodKeyScanningPeriodAbout 4secDetectedKey-outAfter detected key release and do not any trigger about 8secRe-calibrationAbout 4secRe-calibration Valid TriggerSleep mode Operation mode Figure 9-2. The timing for valid trigger 10’/02/25 Page 13 of 18 Ver : 1.0 Preliminary
TTP229-LSF
TM
TonTouch
10. Option table Option table:
TP1 (OPDEN) (SAHL)
8 output pins => CMOS output active-high 1 1 2-wires serial interface => CMOS output active-low (OPDEN)
1 0 8 output pins => CMOS output active-low 2-wires serial interface => CMOS output active-high TP1 0 1 8 output pins => OD output active-low (SAHL) 2-wires serial interface => CMOS output active-low
0 0 8 output pins => OC output active-high
2-wires serial interface => CMOS output active-high
TP2 1 8 input keys mode (KYSEL) 0 16 input keys mode
TP3 TP4
(SKMS1) (SKMS0)
1 1 TP3 All Single-keys:one group(16keys) TP0
TP0 (SKMS1)
Option pin Option states
Feature Remark Default Default Default
Default
Default
Default
TP4
(SKMS0)
1 0 Two groups operate:
group-1=>Single key;group-2=>Single key
0 1 Two groups operate:
group-1=>Single key;group-2=>Multi key
0 0 All Multi-keys:one group(16 keys)
1 0 1 0 1 0
8Hz sampling rate for wake-up in sleep mode Hz sampling rate for wake-up in sleep mode Wake-up sampling length=>about 4.0ms Wake-up sampling length=>about 2.0ms Maximum key-on time disable=>infinite Maximum key-on time enable=>about 80sec
TP5
(WPSCT)
TP6
(SLWPTM)
TP7
(SKSRT)
Note:1. About the combinations of group-1 and group-2, please see above point-4.
2. Option states “1” mean internal pull-up (default). 3. Option states “0” mean that TP0~TP7 pins are via high-value resistors connected to VSS.
10’/02/25 Page 14 of 18 Ver : 1.0
Preliminary
TTP229-LSF
TM
TonTouch
APPLICATION CIRCUIT
APPLICATION FOR 16 INPUT KEYS
VDD
ELECTRODEK3
SKMS1
CJWA
C1104
RP3
K2
KYSEL
1SLPSENA2TP33TP2
CJ0
5TP16TP07TP158TP14
CJ3
9SENADJ310TP1311TP1212SDA13SDO14SCL
VSS28VDD27TP426TP525SENADJ124
TP623TP722TEST21TP820TP919SENADJ218
TP1017TP1116SLPSENB15
CJ2CJ1
SKMS0
K4
RP2
K1
SAHL
TTP229-L
(SSOP-28)
RP4
WPSCT
K5
4SENADJ0
RP1
K0K15K14K13K12
RP5
SLWPTM
K6
RP6
SKSRT
K7K8K9K10K11
RP7
CJWB
10’/02/25 Page 15 of 18 Ver : 1.0
Preliminary TTP229-LSF TMTonTouch APPLICATION FOR 8 INPUT KEYS VDDELECTRODEK3SKMS1CJWAC1104RP3K21SLPSENA2TP33TP2VSS28VDD27TP426TP525SENADJ124TP623TP722TEST21TP820TP919SENADJ218TP1017TP1116SLPSENB15TPQ2TPQ3TPQ0TPQ1CJ1SKMS0K4TTP229-L(SSOP-28)RP4WPSCTK1K5SAHLCJ04SENADJ05TP16TP0TPQ7TPQ6TPQ5TPQ47TP158TP149SENADJ310TP1311TP1212SDA13SDO14SCLRP1K0OPDENRP5SLWPTMK6RP0RP6SKSRTK7RP7 PS:1. On PCB, the length of lines from touch pad to IC pin shorter is better. And the lines do not parallel and cross with other lines. 2. The power supply must be stable. If the supply voltage drift or shift quickly, maybe causing sensitivity anomalies or false detections. 3. The material of panel covering on the PCB can not include the metal or the electric element. The paints on the surfaces are the same. 4. The C1 capacitor must be used between VDD and VSS; and should be routed with very short tracks to the device’s VDD and VSS pins (TTP229-LSF). 5. The capacitance CJ0~CJ3 and CJWA~CJWB can be used to adjust the sensitivity. The value of capacitors use smaller, then the sensitivity will be better. The sensitivity adjustment must according to the practical application on PCB. The range value of capacitors are 1pF≦CJ0~CJ3≦50pF, 1pF≦CJWA~CJWB≦50pF. Recommend to adjust the CJ0~CJ3 capacitor for K0~K15 first, then adjusting the CJWA and CJWB capacitor for Wake-up sensitivity. 6. The sensitivity adjustment capacitors (CJ0~CJ3, CJWA~CJWB) must use smaller temperature coefficient and more stable capacitors. Such are X7R, NPO for example. So for touch
application, recommend to use NPO capacitor, for reducing that the temperature varies to affect sensitivity.
7. Recommend to use 820K ohm resistor for RP0~RP7 resistors.
8. When the system does not use the serial output interface, the SCL pin must be connected to
VSS or VDD, it is not allowed floating.
10’/02/25 Page 16 of 18 Ver : 1.0
Preliminary
TTP229-LSF
TM
TonTouch
PACKAGE OUTLINE (28 PIN SSOP)
Package Type: SSOP-28 Package Outline Dimension
10’/02/25 Page 17 of 18 Ver : 1.0
ORDER INFORMATION
a. Package form: TTP229-LSF
REVISE HISTORY
1. 2010/02/25 -Original version:V_1.0
10’/02/25 Preliminary
Page 18 of 18 TTP229-LSF
TonTouchTM
Ver : 1.0
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