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专利名称：Programmable logic device
发明人：Albert Chan,Ju Shen,Cyrus Y. Tsui,Rafael C.
Camarota
申请号：US09440460申请日：19991115公开号：US06294925B1公开日：20010925
专利附图：
摘要：An improved programmable logic device that generates output signals skewedin time includes a set of I/O cells and first and second logic circuits. Each logic circuitgenerates a logic output signal on a respective output line coupled to at least one of the
I/O cells. A first delay element coupled to the output line of the first logic circuit isprogrammably operable to delay the output signal of the first logic circuit relative to theoutput signal of the second logic circuit in response to a first delay control signal. Asecond delay element coupled to the output line of the second logic circuit is
programmably operable to delay the output signal of the second logic circuit relative tothe output signal of the first logic circuit in response to a second delay control signal.Control circuitry generates the first and second delay control signals so as to preventsimultaneous switching of the logic output signals of the first and second logic circuits.This invention may be used to delay output signals which are not time-critical, allowingfast switching of the limited number of time-critical macrocell output signals.
申请人：LATTICE SEMICONDUCTOR CORPORATION
代理机构：Skjerven Morrill MacPherson LLP
代理人：Edward C. Kwok,Daniel P. Stewart
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